dc.contributor.author |
Gad, V.R. |
|
dc.contributor.author |
Gad, R.S. |
|
dc.contributor.author |
Naik, G.M. |
|
dc.date.accessioned |
2015-06-04T03:23:55Z |
|
dc.date.available |
2015-06-04T03:23:55Z |
|
dc.date.issued |
2012 |
|
dc.identifier.citation |
Advances in Computer Science, Engineering and Applications. 167; 2012; 81-89. |
en_US |
dc.identifier.uri |
http://dx.doi.org/10.1007/978-3-642-30111-7_9 |
|
dc.identifier.uri |
http://irgu.unigoa.ac.in/drs/handle/unigoa/2757 |
|
dc.description.abstract |
Gigabit Ethernet Standard provides 1 Gbps bandwidth and is backward compatible with 10 Mbps (Ethernet) and 100 Mbps (Fast Ethernet). It can also be installed with lower cost than other technologies having similar speed. The performance studies of Gigabit Ethernet is more complex than Ethernet or Fast Ethernet protocols. In this paper we have described the implementation of Gigabit Ethernet design on FPGA using Altera's Triple Speed Ethernet IP Core. The performance analysis of Gigabit Ethernet Standard has been studied using various physical media. This analysis includes performance measurements with different number of frames and frame lengths. |
|
dc.publisher |
Springer |
en_US |
dc.subject |
Electronics |
en_US |
dc.title |
Performance analysis of Gigabit Ethernet Standard for various physical media using triple speed Ethernet IP core on FPGA |
en_US |
dc.type |
Book chapter |
en_US |