Reliable and scalable architecture for Internet of things for sensors using soft-core processor

Abstract

With significant technological developments as well as advances in sensors, wireless communications and Internet - a lot of research areas have emerged, such as wearable computing, context-aware homes, mobile phone sensing and smart vehicle systems. From those emerging areas, there is a clear trend to augment the physical devices/objects with sensing, computing & communication capabilities, connect them together to form a network and make use of the collective effect of networked smart things ? the Internet of Things(IoT). This paper proposes the IoT architecture "Kaivalyam" for sensors/actuator. The configurable interface generates the identity of the 'Thing' and stores in 32-bit datagram. The various configuration of the 32-bit datagram from 4,8,12 and 16-bit device data and respective 14, 12, 10 and 8-bits duplicate identifier can scale the number of devices connected to design platform. These datagram's read into FIFO of the Triple Speed Ethernet (TSE) for transmission using Low Density Parity Check (LDPC) encoder. Simulation studies for the system were performed for block length 512 bits, which is the minimum Ethernet frame length of 64 bytes. AWGN(Additive White Gaussian Noise) is introduced in the channel and BER(Bit Error Rate) is computed for different (1dB to 6dB) SNR(Signal to Noise Ratio) showing BER of 10-4 -4 to 10-5 can be achieved for SNR of 2.5 dB indicating the secured and reliable data transmission.